This series of patches converts the RISC-V CPU interrupt controller to the newer dt-schema binding. Patch 1: This patch is currently at v4 as it has been previously rolled out. Contains the bindings for the interrupt controller. Patch 2: This patch is currently at v4. Contains the reference to the above interrupt controller. Thus, making all the RISC-V interrupt controller bindings in a centralized place. These patches are interdependent. Fixed the patch address mismatch error by changing DCO to @gmail.com Kanak Shilledar (3): dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema dt-bindings: riscv: cpus: add ref to interrupt-controller dt-bindings: serial: vt8500-uart: convert to json-schema .../interrupt-controller/riscv,cpu-intc.txt | 52 ------------- .../interrupt-controller/riscv,cpu-intc.yaml | 73 +++++++++++++++++++ .../devicetree/bindings/riscv/cpus.yaml | 21 +----- .../bindings/serial/via,vt8500-uart.yaml | 46 ++++++++++++ .../bindings/serial/vt8500-uart.txt | 27 ------- 5 files changed, 120 insertions(+), 99 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.yaml create mode 100644 Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml delete mode 100644 Documentation/devicetree/bindings/serial/vt8500-uart.txt base-commit: 83a7eefedc9b56fe7bfeff13b6c7356688ffa670 -- 2.45.2
