Hi Siddharth Vadapalli,
On Wed, 29 May 2024 13:52:55 +0530, Siddharth Vadapalli wrote:
> TI's J784S4 SoC has two x4 Lane and two x2 Lane Gen3 PCIe Controllers.
> This series adds the device-tree nodes for all 4 PCIe instances in the
> SoC file (k3-j784s4-main.dtsi). The J784S4-EVM board has only PCIe0 and
> PCIe1 instances of PCIe brought out while the AM69-SK board has PCIe0,
> PCIe1 and PCIe3 instances of PCIe brought out. The device-tree overlay
> to enable PCIe0 and PCIe1 in Endpoint mode of operation on J784S4-EVM is
> also included in this series.
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/4] arm64: dts: ti: k3-j784s4-main: Add PCIe nodes
commit: 8e05ce691af29db0c7f0d468c8d7c6e13273a9e6
[2/4] arm64: dts: ti: k3-j784s4-evm: Enable PCIe0 and PCIe1 in RC Mode
commit: 27ce26fe52d4dcb5bf58cdf5527e2f3a498c1fdf
[3/4] arm64: dts: ti: k3-j784s4-evm: Add overlay for PCIe0 and PCIe1 EP Mode
commit: 7c4270de2806f80c06dc80c2cf2c8d6eb7c44c59
[4/4] arm64: dts: ti: k3-am69-sk: Add PCIe support
commit: 2f79e7408ac1b22ce8abc4a22b92793a57a3077d
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
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[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
