Internal clock of AD719X devices can be made available on MCLK2 pin. Add clock provider to support this functionality. Signed-off-by: Alisa-Dariana Roman <alisa.roman@xxxxxxxxxx> --- .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 3ae2f860d24c..1434d89c2880 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -42,13 +42,20 @@ properties: description: | Optionally, either a crystal can be attached externally between MCLK1 and MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 - pin. If absent, internal 4.92MHz clock is used. + pin. If absent, internal 4.92MHz clock is used, which can be made + available on MCLK2 pin. clock-names: enum: - xtal - mclk + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + interrupts: maxItems: 1 @@ -204,6 +211,8 @@ examples: spi-max-frequency = <1000000>; spi-cpol; spi-cpha; + #clock-cells = <0>; + clock-output-names = "ad7194_mclk"; interrupts = <25 0x2>; interrupt-parent = <&gpio>; aincom-supply = <&aincom>; -- 2.34.1