> > +
> > + /* Wait for clock propagation */
> > + if (!ret)
> > + udelay(100);
> > + break;
> > +
> > + default:
> > + pr_warn("Unknown event %lu for sys_pll notifier\n", event);
> > + break;
> > + }
> > +
> > + return notifier_from_errno(ret);
> > +}
> > +
> > +static struct a1_sys_pll_nb_data a1_sys_pll_nb_data = {
> > + .nb.notifier_call = meson_a1_sys_pll_notifier_cb,
> > + .cpu_clk = &cpu_clk.hw,
> > + .cpu_fclk = &cpu_fclk.hw,
> > +};
> > +
> > +static int meson_a1_dvfs_setup(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct clk *sys_pll;
> > + int ret;
> > +
> > + /* Setup clock notifier for sys_pll clk */
> > + sys_pll = devm_clk_get(dev, "sys_pll");
> > + if (IS_ERR(sys_pll))
> > + return dev_err_probe(dev, PTR_ERR(sys_pll),
> > + "can't get sys_pll as notifier clock\n");
> > +
> > + a1_sys_pll_nb_data.sys_pll = sys_pll;
> > + ret = devm_clk_notifier_register(dev, sys_pll,
> > + &a1_sys_pll_nb_data.nb);
> > + if (ret)
> > + return dev_err_probe(dev, ret,
> > + "can't register sys_pll notifier\n");
> > +
> > + return ret;
> > +}
>
> I don't think these notifiers are appropriate to handle CPU frequency
> change. Cpufreq has a .target_intermediate() callback that seems more
> appropriate to switch the CPU to a safe clock while relocking a PLL.
>
> You should have a look at it and probably at the imx-cpufreq-dt.c which
> improves on cpufreq-dt.c to handle platform quirks
>
I believed that the same approach was employed with the g12a clock,
which uses a sys_pll <-> cpu fixed clock transition to ensure stable CPU
clocking. Am I overlooking something? Or does the g12a cpu clock
maintain a fixed frequency, thus indicating it is not fragile?
[...]
--
Thank you,
Dmitry
