On 6/10/24 10:06 AM, Alexandre TORGUE wrote:
Hi Marek
Hi,
On 6/7/24 14:48, Marek Vasut wrote:
On 6/7/24 11:57 AM, Christophe Roullier wrote:
[...]
@@ -1505,6 +1511,38 @@ sdmmc2: mmc@58007000 {
status = "disabled";
};
no space here ?
+ ethernet1: ethernet@5800a000 {
+ compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+ reg = <0x5800a000 0x2000>;
+ reg-names = "stmmaceth";
+ interrupts-extended = <&intc GIC_SPI 62
IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 68 1>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "eth-ck";
+ clocks = <&rcc ETH1MAC>,
+ <&rcc ETH1TX>,
+ <&rcc ETH1RX>,
+ <&rcc ETH1STP>,
+ <&rcc ETH1CK_K>;
+ st,syscon = <&syscfg 0x4 0xff0000>;
+ snps,mixed-burst;
+ snps,pbl = <2>;
+ snps,axi-config = <&stmmac_axi_config_1>;
+ snps,tso;
+ access-controllers = <&etzpc 48>;
Keep the list sorted.
The list is currently not sorted. I agree that it is better to have a
common rule to easy the read but it should be applied to all the nodes
for the whole STM32 family. Maybe to address by another series. For the
time being we can keep it as it is.
Why is the st,... and snps,... swapped anyway ? That can be fixed right
here.
Why is the access-controllers at the end ? That can be fixed in separate
series, since that seems to have proliferated considerably.
