On 6/7/24 4:04 AM, Beleswar Padhi wrote:
From: Apurva Nandan <a-nandan@xxxxxx>
The K3 J722S SoCs have one single-core Arm Cortex-R5F processor in each
of the WAKEUP, MCU and MAIN voltage domain, and two C71x DSP subsystems
in MAIN voltage domain. Add the DT nodes to support Inter-Processor
Communication.
Signed-off-by: Apurva Nandan <a-nandan@xxxxxx>
Signed-off-by: Beleswar Padhi <b-padhi@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j722s.dtsi | 63 ++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index c75744edb1433..a894a132f1667 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -87,3 +87,66 @@ &oc_sram {
reg = <0x00 0x70000000 0x00 0x40000>;
ranges = <0x00 0x00 0x70000000 0x40000>;
};
+
+&cbass_main {
There is another series[0] in progress that adds `k3-j722s-main.dtsi` for the J722s
MAIN domain items, these new nodes will belong there.
That does mean there is a dependency on that series, but better than having to move
these nodes over later (and I'm sure Nishanth and Vignesh can sort that out when
taking both these series..)
Andrew
[0]https://lore.kernel.org/linux-arm-kernel/20240604085252.3686037-4-s-vadapalli@xxxxxx/
+ main_r5fss0: r5fss@78400000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x78400000 0x00 0x78400000 0x8000>,
+ <0x78500000 0x00 0x78500000 0x8000>;
+ power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+
+ main_r5fss0_core0: r5f@78400000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x78400000 0x00008000>,
+ <0x78500000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <262>;
+ ti,sci-proc-ids = <0x04 0xff>;
+ resets = <&k3_reset 262 1>;
+ firmware-name = "j722s-main-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ c7x_0: dsp@7e000000 {
+ compatible = "ti,am62a-c7xv-dsp";
+ reg = <0x00 0x7e000000 0x00 0x00200000>;
+ reg-names = "l2sram";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <208>;
+ ti,sci-proc-ids = <0x30 0xff>;
+ resets = <&k3_reset 208 1>;
+ firmware-name = "j722s-c71_0-fw";
+ status = "disabled";
+ };
+
+ c7x_1: dsp@7e200000 {
+ compatible = "ti,am62a-c7xv-dsp";
+ reg = <0x00 0x7e200000 0x00 0x00200000>;
+ reg-names = "l2sram";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <268>;
+ ti,sci-proc-ids = <0x31 0xff>;
+ resets = <&k3_reset 268 1>;
+ firmware-name = "j722s-c71_1-fw";
+ status = "disabled";
+ };
+};
+
+/* MCU domain overrides */
+
+&mcu_r5fss0_core0 {
+ firmware-name = "j722s-mcu-r5f0_0-fw";
+};
+
+/* Wakeup domain overrides */
+
+&wkup_r5fss0_core0 {
+ firmware-name = "j722s-wkup-r5f0_0-fw";
+};
