Am Donnerstag, 6. Juni 2024, 11:53:23 CEST schrieb Cristian Ciocaltea:
> On 6/5/24 5:48 PM, Heiko Stübner wrote:
> > Am Samstag, 1. Juni 2024, 15:12:35 CEST schrieb Cristian Ciocaltea:
> >> The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
> >> the following features, among others:
> >>
> >> * Fixed Rate Link (FRL)
> >> * 4K@120Hz and 8K@60Hz video modes
> >> * Variable Refresh Rate (VRR) including Quick Media Switching (QMS), aka
> >> Cinema VRR
> >> * Fast Vactive (FVA), aka Quick Frame Transport (QFT)
> >> * SCDC I2C DDC access
> >> * TMDS Scrambler enabling 2160p@60Hz with RGB/YCbCr4:4:4
> >> * YCbCr4:2:0 enabling 2160p@60Hz at lower HDMI link speeds
> >> * Multi-stream audio
> >> * Enhanced Audio Return Channel (EARC)
> >>
> >> Add driver to enable basic support, i.e. RGB output up to 4K@60Hz,
> >> without audio, CEC or any HDMI 2.1 specific features.
> >>
> >> Co-developed-by: Algea Cao <algea.cao@xxxxxxxxxxxxxx>
> >> Signed-off-by: Algea Cao <algea.cao@xxxxxxxxxxxxxx>
> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/bridge/synopsys/Makefile | 2 +-
> >> drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 787 +++++++++++++++++++++++++
> >> drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.h | 831 +++++++++++++++++++++++++++
> >> include/drm/bridge/dw_hdmi.h | 8 +
> >> 4 files changed, 1627 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/bridge/synopsys/Makefile b/drivers/gpu/drm/bridge/synopsys/Makefile
> >> index ce715562e9e5..8354e4879f70 100644
> >> --- a/drivers/gpu/drm/bridge/synopsys/Makefile
> >> +++ b/drivers/gpu/drm/bridge/synopsys/Makefile
> >
> >> +static int dw_hdmi_qp_i2c_read(struct dw_hdmi *hdmi,
> >> + unsigned char *buf, unsigned int length)
> >> +{
> >> + struct dw_hdmi_i2c *i2c = hdmi->i2c;
> >> + int stat;
> >> +
> >> + if (!i2c->is_regaddr) {
> >> + dev_dbg(hdmi->dev, "set read register address to 0\n");
> >> + i2c->slave_reg = 0x00;
> >> + i2c->is_regaddr = true;
> >> + }
> >> +
> >> + while (length--) {
> >> + reinit_completion(&i2c->cmp);
> >> +
> >> + dw_hdmi_qp_mod(hdmi, i2c->slave_reg++ << 12, I2CM_ADDR,
> >> + I2CM_INTERFACE_CONTROL0);
> >> +
> >> + dw_hdmi_qp_mod(hdmi, I2CM_FM_READ, I2CM_WR_MASK,
> >> + I2CM_INTERFACE_CONTROL0);
> >
> > Somehow the segment handling is present in the rest of the i2c code here, but
> > not the actual handling for reads.
> >
> > The vendor-kernel does:
> >
> > - dw_hdmi_qp_mod(hdmi, I2CM_FM_READ, I2CM_WR_MASK,
> > - I2CM_INTERFACE_CONTROL0);
> > + if (i2c->is_segment)
> > + dw_hdmi_qp_mod(hdmi, I2CM_EXT_READ, I2CM_WR_MASK,
> > + I2CM_INTERFACE_CONTROL0);
> > + else
> > + dw_hdmi_qp_mod(hdmi, I2CM_FM_READ, I2CM_WR_MASK,
> > + I2CM_INTERFACE_CONTROL0);
>
> Hmm, for some reason this is not present in the stable-5.10-rock5 branch
> I've been using as an implementation reference:
>
> https://github.com/radxa/kernel/blob/stable-5.10-rock5/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c#L760
>
> Is there an updated fork?
I think the radxa code-base is quite old in terms of sdk-version it's based on.
Grabbing a 6.1 branch from Radxa shows it in:
https://github.com/radxa/kernel/blob/linux-6.1-stan-rkr1/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c#L995
> > Without this change, connecting to a DVI display does not work, and
> > reading the EDID ends in the "i2c read error" below.
> >
> > Adding the segment handling as above makes the DVI connection
> > work (as it does in the vendor-kernel).
> >
> > So it would be nice if you could maybe incorporate this in the next version?
>
> Sure, thanks for pointing this out!
>
> Cristian
>
