> -----Original Message----- > From: Andrew Lunn [mailto:andrew@xxxxxxx] > Sent: 15 August 2023 02:17 > To: Sriranjani P <sriranjani.p@xxxxxxxxxxx> > Cc: davem@xxxxxxxxxxxxx; edumazet@xxxxxxxxxx; kuba@xxxxxxxxxx; > pabeni@xxxxxxxxxx; robh+dt@xxxxxxxxxx; > krzysztof.kozlowski+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx; > richardcochran@xxxxxxxxx; alexandre.torgue@xxxxxxxxxxx; > joabreu@xxxxxxxxxxxx; mcoquelin.stm32@xxxxxxxxx; > alim.akhtar@xxxxxxxxxxx; linux-fsd@xxxxxxxxx; > pankaj.dubey@xxxxxxxxxxx; swathi.ks@xxxxxxxxxxx; > ravi.patel@xxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-samsung- > soc@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Chandrasekar R > <rcsekar@xxxxxxxxxxx>; Suresh Siddha <ssiddha@xxxxxxxxx> > Subject: Re: [PATCH v3 2/4] net: stmmac: dwc-qos: Add FSD EQoS support > > > +static const int rx_clock_skew_val[] = {0x2, 0x0}; > > > +static int dwc_eqos_setup_rxclock(struct platform_device *pdev, int > > +ins_num) { > > + struct device_node *np = pdev->dev.of_node; > > + struct regmap *syscon; > > + unsigned int reg; > > + > > + if (np && of_property_read_bool(np, "fsd-rx-clock-skew")) { > > + syscon = syscon_regmap_lookup_by_phandle_args(np, > > + "fsd-rx-clock- > skew", > > + 1, ®); > > + if (IS_ERR(syscon)) { > > + dev_err(&pdev->dev, > > + "couldn't get the rx-clock-skew syscon!\n"); > > + return PTR_ERR(syscon); > > + } > > + > > + regmap_write(syscon, reg, rx_clock_skew_val[ins_num]); > > Please could you explain what this is doing. As per customer requirement, we need to provide a delay of 2ns in FSYS in both TX and RX path and no delay in peric block > > Andrew Regards, Swathi