On 6/4/2024 6:41 AM, Sibi Sankar wrote:
Add the CPU and LLCC BWMONs on X1E80100 SoCs.
Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 169 +++++++++++++++++++++++++
1 file changed, 169 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 1929c34ae70a..d86c4d3be126 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5329,6 +5329,175 @@ cpu_scp_lpri1: scp-sram-section@200 {
};
};
+ pmu@24091000 {
+ compatible = "qcom,x1e80100-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
+ reg = <0 0x24091000 0 0x1000>;
+
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI1 3>;
+
+ operating-points-v2 = <&llcc_bwmon_opp_table>;
+
+ llcc_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-0 {
Nitpick,In one table, we start from ‘opp-0,’ while in the other table,
it begins with ‘opp-1,it is better to make it consistent across table.
+ opp-peak-kBps = <800000>;
+ };
+
+ opp-1 {
+ opp-peak-kBps = <2188000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <3072000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <6220800>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <6835200>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <8371200>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <10944000>;
+ };
+
+ opp-7 {
+ opp-peak-kBps = <12748800>;
+ };
+
+ opp-8 {
+ opp-peak-kBps = <14745600>;
+ };
+
+ opp-9 {
+ opp-peak-kBps = <16896000>;
+ };
+ };
+ };
+
+ pmu@240b3400 {
+ compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0 0x240b3400 0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
+ operating-points-v2 = <&cpu0_bwmon_opp_table>;
+
+ cpu0_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-1 {
+ opp-peak-kBps = <4800000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <7464000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <9600000>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <12896000>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <14928000>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <17064000>;
+ };
+ };
+ };
+
+ pmu@240b5400 {
+ compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0 0x240b5400 0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
+ operating-points-v2 = <&cpu8_bwmon_opp_table>;
+
+ cpu8_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-1 {
+ opp-peak-kBps = <4800000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <7464000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <9600000>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <12896000>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <14928000>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <17064000>;
+ };
+ };
+ };
+
+ pmu@240b6400 {
+ compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+ reg = <0 0x240b6400 0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
+ operating-points-v2 = <&cpu4_bwmon_opp_table>;
+
+ cpu4_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-1 {
+ opp-peak-kBps = <4800000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <7464000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <9600000>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <12896000>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <14928000>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <17064000>;
+ };
+ };
+ };
+
system-cache-controller@25000000 {
compatible = "qcom,x1e80100-llcc";
reg = <0 0x25000000 0 0x200000>,
Thanks,
Shivnandan
