On Wed, 05 Jun 2024 10:33:03 +0200, Florian Vaussard wrote: > Hello, > > This series adds support for the Terasic DE1-SOC board, which is very > similar to the Terasic SoCKit with a few notable differences. > > Best regards, > Florian > > Florian Vaussard (2): > dt-bindings: altera: Add Terasic DE1-SOC board > ARM: dts: socfpga: Add support for Terasic DE1-SOC board > > .../devicetree/bindings/arm/altera.yaml | 1 + > arch/arm/boot/dts/intel/socfpga/Makefile | 1 + > .../socfpga/socfpga_cyclone5_de1_soc.dts | 106 ++++++++++++++++++ > 3 files changed, 108 insertions(+) > create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dts > > > base-commit: 1536dc8edc653e0e4a333035a73ff146d0517749 > -- > 2.45.1 > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y intel/socfpga/socfpga_cyclone5_de1_soc.dtb' for 20240605083321.1211198-1-florian.vaussard@xxxxxxxxx: arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: pmu@ff111000: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/arm/pmu.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: soc: base_fpga_region: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: soc: usbphy: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: soc: stmmac-axi-config: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: soc: sdramedac: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' from schema $id: http://devicetree.org/schemas/simple-bus.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: pdma@ffe01000: $nodename:0: 'pdma@ffe01000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/arm,pl330.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: base_fpga_region: $nodename:0: 'base_fpga_region' does not match '^fpga-region(@.*|-([0-9]|[1-9][0-9]+))?$' from schema $id: http://devicetree.org/schemas/fpga/fpga-region.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: clkmgr@ffd04000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: osc2: 'clock-frequency' is a required property from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: f2s_periph_ref_clk: 'clock-frequency' is a required property from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: f2s_sdram_ref_clk: 'clock-frequency' is a required property from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40: failed to match any schema with compatible: ['altr,socfpga-pll-clock'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/mpuclk@48: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/mainclk@4c: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/dbg_base_clk@50: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/main_qspi_clk@54: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/main_nand_sdmmc_clk@58: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/main_pll@40/cfg_h2f_usr0_clk@5c: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80: failed to match any schema with compatible: ['altr,socfpga-pll-clock'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/emac0_clk@88: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/emac1_clk@8c: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/per_qsi_clk@90: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/per_nand_mmc_clk@94: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/per_base_clk@98: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/periph_pll@80/h2f_usr1_clk@9c: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdram_pll@c0: failed to match any schema with compatible: ['altr,socfpga-pll-clock'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdram_pll@c0/ddr_dqs_clk@c8: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdram_pll@c0/ddr_2x_dqs_clk@cc: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdram_pll@c0/ddr_dq_clk@d0: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdram_pll@c0/h2f_usr2_clk@d4: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/mpu_periph_clk: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/mpu_l2_ram_clk: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l4_main_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l3_main_clk: failed to match any schema with compatible: ['altr,socfpga-perip-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l3_mp_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l3_sp_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l4_mp_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/l4_sp_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/dbg_at_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/dbg_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/dbg_trace_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/dbg_timer_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/cfg_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/h2f_user0_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/emac_0_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/emac_1_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/usb_mp_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/spi_m_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/can0_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/can1_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/gpio_db_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/h2f_user1_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdmmc_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/sdmmc_clk_divided: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/nand_x_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/nand_ecc_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/nand_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/qspi_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/ddr_dqs_clk_gate: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/ddr_2x_dqs_clk_gate: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/ddr_dq_clk_gate: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/clkmgr@ffd04000/clocks/h2f_user2_clk: failed to match any schema with compatible: ['altr,socfpga-gate-clk'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: fpga_bridge@ff400000: $nodename:0: 'fpga_bridge@ff400000' does not match '^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$' from schema $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: fpga_bridge@ff500000: $nodename:0: 'fpga_bridge@ff500000' does not match '^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$' from schema $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/fpgamgr@ff706000: failed to match any schema with compatible: ['altr,socfpga-fpga-mgr'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/ethernet@ff700000: failed to match any schema with compatible: ['altr,socfpga-stmmac', 'snps,dwmac-3.70a', 'snps,dwmac'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/ethernet@ff702000: failed to match any schema with compatible: ['altr,socfpga-stmmac', 'snps,dwmac-3.70a', 'snps,dwmac'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/eccmgr: failed to match any schema with compatible: ['altr,socfpga-ecc-manager'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/eccmgr/l2-ecc@ffd08140: failed to match any schema with compatible: ['altr,socfpga-l2-ecc'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/eccmgr/ocram-ecc@ffd08144: failed to match any schema with compatible: ['altr,socfpga-ocram-ecc'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/l3regs@ff800000: failed to match any schema with compatible: ['altr,l3regs', 'syscon'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: sram@ffff0000: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: sram@ffff0000: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: sram@ffff0000: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: spi@ff705000: resets: [[6, 37]] is too short from schema $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/sdramedac: failed to match any schema with compatible: ['altr,sdram-edac'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: /soc/sysmgr@ffd08000: failed to match any schema with compatible: ['altr,sys-mgr', 'syscon'] arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: timer0@ffc08000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: timer1@ffc09000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: timer2@ffd00000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: timer3@ffd01000: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de1_soc.dtb: gpio-keys: 'hps_key' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
