> From: Peng Fan (OSS) <peng.fan@xxxxxxxxxxx> > Sent: 2024年5月21日 14:26 > > All: > There was a v6 that use generic properties, but at a late stage, NXP internals > decides to switch to fsl,pins property to align with other i.MXs. Since new > properties, drivers rewrite, I start this patchset from v1 with a new patch title. > A RFC patch for binding was posted, since Rob said he is fine, so post this > patchset out. > > Whether v6 or this patchset, patch 2 is a must and was not changed from > v6. > > The pinctrl stuff has been pending for quite sometime, I would be > apprecaited if any quick comments. > > v6: > > https://lore.kernel.org/all/20240513-pinctrl-scmi-oem-v3-v6-0-904975c99cc4 > @nxp.com/ > RFC: > https://lore.kernel.org/all/20240520194942.GA1374705-robh@xxxxxxxxxx/ > > Thanks, > Peng. > > ARM SCMI v3.2 Table 24 Pin Configuration Type and Enumerations: > '192 -255 OEM specific units'. > > i.MX95 System Manager FW supports SCMI PINCTRL protocol, but it has zero > functions, groups. So pinctrl-scmi.c could not be reused for i.MX95. > Because nxp,pin-func, nxp,pin-conf properties are rejected by dt maintainers, > so use 'fsl,pins' which requires a new driver pinctrl-imx-scmi.c > > The node will be as below: > pinctrl_usdhc1: usdhc1grp { > fsl,pins = < > IMX95_PAD_SD1_CLK__USDHC1_CLK 0x158e > IMX95_PAD_SD1_CMD__USDHC1_CMD 0x138e > IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x138e > IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x138e > IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x138e > IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x138e > IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x138e > IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x138e > IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x138e > IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x138e > IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x158e > >; > }; > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> For the series: Reviewed-by: Dong Aisheng <aisheng.dong@xxxxxxx> Regards Aisheng
