On Thu, May 23, 2024 at 04:40:05PM +0530, Siddharth Vadapalli wrote: > TI's J784S4 has two x4 Lane and two x2 Lane Gen3 PCIe Controllers. > This series adds the device-tree nodes for all 4 PCIe instances in the > SoC file. The Board (J784S4-EVM) has only PCIe0 and PCIe1 instances of > PCIe brought out, due to which only those PCIe instances are being > enabled in the board file. The device-tree overlay to enable PCIe0 and > PCIe1 in Endpoint mode of operation is also included in this series. Kindly ignore this series. I will post the v4 series with PCIe2 and PCIe3 regions reserved in k3-j784s4.dtsi which I have missed in this series. Regards, Siddharth.
