On 4/25/24 08:23, Manikanta Guntupalli wrote:
Add resets property for UART0 and UART1 nodes Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@xxxxxxx> --- Changes for V2: None. Changes for V3: None. --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 25d20d803230..935504424ec6 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -906,6 +906,7 @@ uart0: serial@ff000000 { reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART0>; };uart1: serial@ff010000 {@@ -917,6 +918,7 @@ uart1: serial@ff010000 { reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART1>; };usb0: usb@ff9d0000 {
This patch should likely go via my tree but if Greg wants to take it directly that's fine for me.
In that case here is my Acked-by: Michal Simek <michal.simek@xxxxxxx> Thanks, Michal
