removed the redundant properties for interrupt-controller and provide reference to the riscv,cpu-intc.yaml which defines the interrupt-controller. making the properties for riscv interrupt-controller at a central place. Signed-off-by: Kanak Shilledar <kanakshilledar111@xxxxxxxxxxxxxx> --- .../devicetree/bindings/riscv/cpus.yaml | 22 +------------------ 1 file changed, 1 insertion(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index d87dd50f1a4b..b90bb83c8e73 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -101,27 +101,7 @@ properties: timebase-frequency: false interrupt-controller: - type: object - additionalProperties: false - description: Describes the CPU's local interrupt controller - - properties: - '#interrupt-cells': - const: 1 - - compatible: - oneOf: - - items: - - const: andestech,cpu-intc - - const: riscv,cpu-intc - - const: riscv,cpu-intc - - interrupt-controller: true - - required: - - '#interrupt-cells' - - compatible - - interrupt-controller + $ref: /schemas/interrupt-controller/riscv,cpu-intc.yaml cpu-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array -- 2.34.1