On Sat, 4 May 2024 23:53:44 +0200
Andreas Kemnade <andreas@xxxxxxxxxxxx> wrote:
> There is a variation of the Kobo Clara HD containing a PMIC with different
> default settings for the regulators in the OTP and therefore also
> regulators wired up in a different way, so add a proper devicetree for it
> to avoid some magic smoke.
>
[...]
> +&cpu0 {
> + arm-supply = <&dcdc5_reg>;
> + soc-supply = <&dcdc2_reg>;
> +};
> +
Vendor devicetree has also this snippet for that revision:
cpus {
cpu0: cpu@0 {
operating-points = < /* Core2_1V3_ARM */
/* kHz uV */
996000 1062500
792000 1062500
396000 1062500
198000 975000
>;
fsl,soc-operating-points = < /* Core2_1V3_SOC */
/* ARM kHz SOC-PU uV */
996000 987500
792000 987500
396000 987500
198000 900000
>;
};
};
Apparently we run into https://gitlab.com/postmarketOS/pmaports/-/issues/2811
but I cannot find any documentation an alternative voltage ranges for that SoC
(i.MX6SLL). So not all 6SLLs are created equal? At least we do not mix up 1.XV regulators
with 3.3 regulators now, that is more healthy.
Regards,
Andreas
