The Microchip PolarFire SoC SPI "hard" controller supports eight chip selects. However, only one chip select is physically wired. Therefore, use GPIO descriptors to configure additional chip select lines. v1-> v2: - Modified all commit messages for better understanding - driver - added spi_is_csgpiod() API to address review comment - bindings - fixed bindings to set the default value of num-cs Prajna Rajendra Kumar (3): spi: dt-bindings: Add num-cs property for mpfs-spi spi: spi-microchip-core: Fix the number of chip selects supported spi: spi-microchip-core: Add support for GPIO based CS .../bindings/spi/microchip,mpfs-spi.yaml | 29 +++++++++++++++++-- drivers/spi/spi-microchip-core.c | 6 +++- 2 files changed, 31 insertions(+), 4 deletions(-) -- 2.25.1
