On Thu, May 09, 2024 at 10:24:08PM +0300, Tomer Maimon wrote: > Adding 25MHz reference clock and clock-cell properties to NPCM reset > document due to the registration of the npcm8xx clock auxiliary bus device > in the NPCM reset driver > > The NPCM8xx clock auxiliary bus device has been registered in the NPCM > reset driver because the reset and the clock share the same register > region. auxiliary bus is a Linux concept. The reasoning for this should be the reset block also provides clocks. > Signed-off-by: Tomer Maimon <tmaimon77@xxxxxxxxx> > --- > .../bindings/reset/nuvoton,npcm750-reset.yaml | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > index d82e65e37cc0..18db4de13098 100644 > --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > @@ -21,6 +21,13 @@ properties: > '#reset-cells': > const: 2 > > + '#clock-cells': > + const: 1 > + > + clocks: > + items: > + - description: specify external 25MHz referance clock. s/referance/reference/ > + > nuvoton,sysgcr: > $ref: /schemas/types.yaml#/definitions/phandle > description: a phandle to access GCR registers. > @@ -39,6 +46,17 @@ required: > - '#reset-cells' > - nuvoton,sysgcr > > +if: > + properties: > + compatible: > + contains: > + enum: > + - nuvoton,npcm845-reset > +then: > + required: > + - '#clock-cells' > + - clocks New required properties are an ABI break. Please justify why that's okay for this platform in the commit message (assuming that it is). Rob
