v5 changes: dt-binding - Fix dt_binding_check errors of fsl,refclk-pad-mode. And, add the unused description of this property. - Add description for each register entry. - Add fsl,hsio-cfg description. - Other minor refine changes. PHY driver - To make codes safe enough in multi instances probe, use scoped_guard() to replace the atomic_###() callbacks. v4:https://patchwork.kernel.org/project/linux-phy/cover/1715234181-672-1-git-send-email-hongxing.zhu@xxxxxxx/ v4 changes: - Re-format the "phy-cells" as <&hsio_phy lane_id phy_mode controller_id> - Use each lane as a phys entry, suggested by Rob. PCIEA: phys = <&hsio_phy 0 PHY_MODE_PCIE>; or: phys = <&hsio_phy 0 PHY_MODE_PCIE>, <&hsio_phy 1 PHY_MODE_PCIE>; PCIEB: phys = <&hsio_phy 1 PHY_MODE_PCIE>; or: phys = <&hsio_phy 2 PHY_MODE_PCIE>; SATA: phys = <&hsio_phy 2 PHY_MODE_SATA>; - Add a new propery "fsl,hsio-cfg". The HSIO configuration (fsl,hsio-cfg) is one global state. It should be known and used to set global setting: PCIE_AB_SELECT and PHY_X1_EPCS_SEL at the begin of HSIO initialization like this listed below. +-------------------------------------------------------------+ |CRR(SYS.CSR) register|PCIAx2 and|PCIEAx1, PCIEBx1|PCIEAx2 and| | |SATA |SATA |PCIEBx1 | |---------------------|----------|----------------|-----------| |PCIE_AB_SELECT | 0 | 1 | 1 | |---------------------|----------|----------------|-----------| |PHY_X1_EPCS_SEL | 1 | 1 | 0 | +-------------------------------------------------------------+ When first PHY instance is probed, PHY driver can't get a global view of the HSIO use case and doesn't know how to set global setting: PCIE_AB_SELECT and PHYX1_EPCS_SEL. Because first PHY instance doesn't know followed PHY instance use mode. So, one property named "fsl,hsio-cfg" has to be introduced here to specify the setting of the global setting: PCIE_AB_SELECT and PHY_X1_EPCS_SEL. Here is the discussion about this. https://lkml.org/lkml/2024/4/26/231 - Address Conor's comments about the "fsl,refclk-pad-mode". fsl,refclk-pad-mode: description: ... enum: ["input", "output"]. v3:https://patchwork.kernel.org/project/linux-phy/cover/1713939683-15328-1-git-send-email-hongxing.zhu@xxxxxxx/ v3 changes: Refer to Conor's comments. - Let filename match a compatible - Refine description of the fsl,refclk-pad-mode. - Remove power-domains description. - Keep clock ording for two devices. - Drop the unused label and status. Refer to Rob's comments. - Use standard phy mode defines. - Correct the spell mistakes in the binding document. v2:https://patchwork.kernel.org/project/linux-phy/cover/1712036704-21064-1-git-send-email-hongxing.zhu@xxxxxxx/ v2 changes: - Place the dt-bindings header file changes as the first one in the patch-set, make the annotation more clear, and add Frank's Reviewed-by tag. v1:https://patchwork.kernel.org/project/linux-phy/cover/1711699790-16494-1-git-send-email-hongxing.zhu@xxxxxxx/ [PATCH v5 1/2] dt-bindings: phy: Add i.MX8Q HSIO SerDes PHY binding [PATCH v5 2/2] phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY Documentation/devicetree/bindings/phy/fsl,imx8qm-hsio.yaml | 152 +++++++++++++++++++++ drivers/phy/freescale/Kconfig | 8 ++ drivers/phy/freescale/Makefile | 1 + drivers/phy/freescale/phy-fsl-imx8qm-hsio.c | 608 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/dt-bindings/phy/phy-imx8-pcie.h | 29 ++++ 5 files changed, 798 insertions(+)
