When dealing with certain PLLs, it is necessary to avoid modifying them if they have already been initialized by lower levels. For instance, in the A1 SoC Family, the sys_pll is enabled as the parent for the cpuclk, and it cannot be disabled during the initialization sequence. Therefore, initialization phase must be skipped. Signed-off-by: Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxxxxx> --- drivers/clk/meson/clk-pll.c | 37 +++++++++++++++++++++---------------- drivers/clk/meson/clk-pll.h | 1 + 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 78d17b2415af..47b22a6be2e4 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -289,11 +289,32 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw) return -ETIMEDOUT; } +static int meson_clk_pll_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); + + if (MESON_PARM_APPLICABLE(&pll->rst) && + meson_parm_read(clk->map, &pll->rst)) + return 0; + + if (!meson_parm_read(clk->map, &pll->en) || + !meson_parm_read(clk->map, &pll->l)) + return 0; + + return 1; +} + static int meson_clk_pll_init(struct clk_hw *hw) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); + /* Do not init already enabled PLL which marked with 'init_once' */ + if ((pll->flags & CLK_MESON_PLL_INIT_ONCE) && + meson_clk_pll_is_enabled(hw)) + return 0; + if (pll->init_count) { if (MESON_PARM_APPLICABLE(&pll->rst)) meson_parm_write(clk->map, &pll->rst, 1); @@ -308,22 +329,6 @@ static int meson_clk_pll_init(struct clk_hw *hw) return 0; } -static int meson_clk_pll_is_enabled(struct clk_hw *hw) -{ - struct clk_regmap *clk = to_clk_regmap(hw); - struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); - - if (MESON_PARM_APPLICABLE(&pll->rst) && - meson_parm_read(clk->map, &pll->rst)) - return 0; - - if (!meson_parm_read(clk->map, &pll->en) || - !meson_parm_read(clk->map, &pll->l)) - return 0; - - return 1; -} - static int meson_clk_pcie_pll_enable(struct clk_hw *hw) { int retries = 10; diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h index a2228c0fdce5..23195ea4eae1 100644 --- a/drivers/clk/meson/clk-pll.h +++ b/drivers/clk/meson/clk-pll.h @@ -28,6 +28,7 @@ struct pll_mult_range { } #define CLK_MESON_PLL_ROUND_CLOSEST BIT(0) +#define CLK_MESON_PLL_INIT_ONCE BIT(1) struct meson_clk_pll_data { struct parm en; -- 2.43.0