On Thu, May 09, 2024 at 10:57:38AM +0800, Shengjiu Wang wrote: > Add two PLL clock sources, they are the parent clocks of the root clock > one is for 8kHz series rates, named as 'pll8k', another one is for > 11kHz series rates, named as 'pll11k'. They are optional clocks, > if there are such clocks, then the driver can switch between them to > support more accurate sample rates. > > As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4' for > clocks and clock-names properties. Despite the detail given here in the commit message, the series this is appearing in and one of the driver patches makes me a bit "suspicious" of this patch. Are these newly added clocks available on all devices, or just on the imx95, or? Thanks, Conor. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx> > --- > Documentation/devicetree/bindings/sound/fsl,xcvr.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > index 1c74a32def09..c4660faed404 100644 > --- a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > +++ b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml > @@ -50,6 +50,9 @@ properties: > - description: PHY clock > - description: SPBA clock > - description: PLL clock > + - description: PLL clock source for 8kHz series > + - description: PLL clock source for 11kHz series > + minItems: 4 > > clock-names: > items: > @@ -57,6 +60,9 @@ properties: > - const: phy > - const: spba > - const: pll_ipg > + - const: pll8k > + - const: pll11k > + minItems: 4 > > dmas: > items: > -- > 2.34.1 >
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