Add the Designware MIPI DSI controller and it's port nodes.
Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
---
changes since v1:
- added HCLK_VIO_H2P as ahb clock
changes since v2:
- dropped ahb clock again
arch/arm/boot/dts/rockchip/rk3128.dtsi | 36 ++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index fbd95bb08cd3..7f2bf3e51082 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -277,6 +277,42 @@ vop_out_hdmi: endpoint@0 {
reg = <0>;
remote-endpoint = <&hdmi_in_vop>;
};
+
+ vop_out_dsi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dsi_in_vop>;
+ };
+ };
+ };
+
+ dsi: dsi@10110000 {
+ compatible = "rockchip,rk3128-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x10110000 0x4000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_MIPI>;
+ clock-names = "pclk";
+ phys = <&dphy>;
+ phy-names = "dphy";
+ resets = <&cru SRST_VIO_MIPI_DSI>;
+ reset-names = "apb";
+ rockchip,grf = <&grf>;
+ power-domains = <&power RK3128_PD_VIO>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dsi_in: port@0 {
+ reg = <0>;
+ dsi_in_vop: endpoint {
+ remote-endpoint = <&vop_out_dsi>;
+ };
+ };
+
+ dsi_out: port@1 {
+ reg = <1>;
+ };
};
};
--
2.43.2
