From: Daniel González Cabanelas <dgcbueu@xxxxxxxxx>
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.
Signed-off-by: Daniel González Cabanelas <dgcbueu@xxxxxxxxx>
Signed-off-by: Álvaro Fernández Rojas <noltari@xxxxxxxxx>
[ rework code and reduce code duplication ]
Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
Acked-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>
---
arch/mips/kernel/smp-bmips.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index a4f84667a901..0f93963c08e4 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -620,6 +620,23 @@ void bmips_cpu_setup(void)
__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
break;
+ case CPU_BMIPS4350:
+ u32 rac_addr = BMIPS_RAC_CONFIG_1;
+
+ if (!(read_c0_brcm_cmt_local() & (1 << 31)))
+ rac_addr = BMIPS_RAC_CONFIG;
+
+ /* Enable data RAC */
+ cfg = __raw_readl(bmips_cbr_addr + rac_addr);
+ __raw_writel(cfg | 0xf, bmips_cbr_addr + rac_addr);
+ __raw_readl(bmips_cbr_addr + rac_addr);
+
+ /* Flush stale data out of the readahead cache */
+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ break;
+
case CPU_BMIPS4380:
/* CBG workaround for early BMIPS4380 CPUs */
switch (read_c0_prid()) {
--
2.43.0
