On 5/7/24 06:07, Rob Herring wrote:
On Fri, May 03, 2024 at 11:20:59PM +0200, Christian Marangi wrote:Document brcm,bmips-cbr-reg and brcm,bmips-broken-cbr-reg property. Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0 if called from TP1. The CBR address is always the same on the SoC hence it can be provided in DT to handle broken case where bootloader doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1. Usage of this property is to give an address also in these broken configuration/bootloader. If the SoC/Bootloader ALWAYS provide a broken CBR address the property "brcm,bmips-broken-cbr-reg" can be used to ignore any value already set in the registers for CBR address.Why can't these be implied from an SoC specific compatible?
Because some SoCs with the same compatible have it right, and some wrong, courtesy of how the various OEMs implemented it.
It's not a great design where you have to update the DT which should be provided from the bootloader in order to work-around bootloader issues...
The bootloader was designed without DT in mind, and while CFE had a callback mechanism to query environment variables and whatnot, those devices were stripped out of it.
Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx> --- .../devicetree/bindings/mips/brcm/soc.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml index 975945ca2888..29af8f0db785 100644 --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml @@ -55,6 +55,21 @@ properties: under the "cpus" node. $ref: /schemas/types.yaml#/definitions/uint32+ brcm,bmips-broken-cbr-reg:+ description: Declare that the Bootloader init a broken + CBR address in the registers and the one provided from + DT should always be used.Why wouldn't brcm,bmips-cbr-reg being present indicate to use it?+ type: boolean + + brcm,bmips-cbr-reg: + description: Reference address of the CBR. + Some SoC suffer from a BUG where read_c0_brcm_cbr() might + return 0 if called from TP1. The CBR address is always the + same on the SoC hence it can be provided in DT to handle + broken case where bootloader doesn't initialise it or SMP + where read_c0_brcm_cbr() returns 0 from TP1. + $ref: /schemas/types.yaml#/definitions/uint32CBR is never defined anywhere in this patch.
The very presence of "brcm,bmips-cbr-reg" property should be enough to indicate to the kernel that it should the value provided, rather than the value returned from read_c0_brcm_cbr(). That is, I don't think there is a need to indicate to the kernel that the CBR value is broken, if you provide a new value that is enough of a clue to tel you that.
-- Florian
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