From: Emil Renner Berthing <kernel@xxxxxxxx>
Add missing device tree nodes for UART0 and UART1 on the StarFive JH7100
SoC. UART0 is used for Bluetooth on the BeagleV Starlight and StarFive
VisionFive V1 boards.
Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx>
---
arch/riscv/boot/dts/starfive/jh7100.dtsi | 26 ++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index 9a2e9583af88..34c1622d5496 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -258,6 +258,32 @@ sysmain: syscon@11850000 {
reg = <0x0 0x11850000 0x0 0x10000>;
};
+ uart0: serial@11870000 {
+ compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart";
+ reg = <0x0 0x11870000 0x0 0x10000>;
+ clocks = <&clkgen JH7100_CLK_UART0_CORE>,
+ <&clkgen JH7100_CLK_UART0_APB>;
+ clock-names = "baudclk", "apb_pclk";
+ resets = <&rstgen JH7100_RSTN_UART0_APB>;
+ interrupts = <92>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
+ uart1: serial@11880000 {
+ compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart";
+ reg = <0x0 0x11880000 0x0 0x10000>;
+ clocks = <&clkgen JH7100_CLK_UART1_CORE>,
+ <&clkgen JH7100_CLK_UART1_APB>;
+ clock-names = "baudclk", "apb_pclk";
+ resets = <&rstgen JH7100_RSTN_UART1_APB>;
+ interrupts = <93>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
i2c0: i2c@118b0000 {
compatible = "snps,designware-i2c";
reg = <0x0 0x118b0000 0x0 0x10000>;
--
2.43.0
