Set SDHCI timing registers through config settings for
Tegra234 chip and P3701 board.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@xxxxxxxxxx>
---
arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi | 32 ++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
index 832538e45797..f9a92853b04a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
@@ -442,5 +442,37 @@ standard {
};
};
+ mmc@3400000 {
+ config {
+
+ mmc-hs200 {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ uhs-sdr104 {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ uhs-sdr50 {
+ nvidia,num-tuning-iter = <0x4>;
+ };
+
+ };
+ };
+
+ mmc@3460000 {
+ config {
+
+ mmc-hs200 {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ mmc-hs400 {
+ nvidia,num-tuning-iter = <0x2>;
+ };
+
+ };
+ };
+
};
};
--
2.43.2
