RK3128 SoCs have two i2s controllers. i2s_8ch has 8 tx and 2 rx channels
and is internally hard-wired to the hdmi-controller respectivly the SoC's
analog codec. i2s_2ch has 2 tx and 2 rx channels and can also be used
externally as it's pins are exposed though pinctrl.
Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
---
arch/arm/boot/dts/rockchip/rk3128.dtsi | 27 ++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index fb98873fd94e..d0d1d7c2ab2f 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -360,6 +360,18 @@ usb_host_ohci: usb@101e0000 {
status = "disabled";
};
+ i2s_8ch: i2s@10200000 {
+ compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s";
+ reg = <0x10200000 0x1000>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
+ clock-names = "i2s_clk", "i2s_hclk";
+ dmas = <&pdma 14>, <&pdma 15>;
+ dma-names = "tx", "rx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
sdmmc: mmc@10214000 {
compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x10214000 0x4000>;
@@ -408,6 +420,21 @@ emmc: mmc@1021c000 {
status = "disabled";
};
+ i2s_2ch: i2s@10220000 {
+ compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s";
+ reg = <0x10220000 0x1000>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S_2CH>;
+ clock-names = "i2s_clk", "i2s_hclk";
+ dmas = <&pdma 0>, <&pdma 1>;
+ dma-names = "tx", "rx";
+ rockchip,playback-channels = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_bus>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
nfc: nand-controller@10500000 {
compatible = "rockchip,rk3128-nfc", "rockchip,rk2928-nfc";
reg = <0x10500000 0x4000>;
--
2.43.2
