On Thu, 2024-05-02 at 16:53 +0200, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On 02/05/2024 16:34, Prajna Rajendra Kumar wrote: > > The PolarFire SoC SPI controller supports multiple chip selects,but > > in > > the MSS, only one CS line is physically wired. To reflect this > > hardware > > limitation in the device tree, the binding enforces that the 'num- > > cs' > > property defaults to 1 and cannot exceed 1 unless additional > > chip select lines are explicitly defined using GPIO descriptors. > > > Hi, > You marked it as Fix for bug, but I don't understand where the bug > is. The bug was that the PolarFire SoC SPI "hard" controller supports eight chip selects, but only one chip select is connected and can be used. This was not reflected in the device tree because default num-cs was never set. Hence, it's marked as a fix. > Do you describe above the issue or the solution? It describes both the issue and the solution, but I will revise the commit message as Conor Dooley suggested. > > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: microchip,mpfs-spi > > + not: > > + required: > > + - cs-gpios > > I don't understand what you are expressing here. Did you actually > validate it that it achieves exactly what you want? Since the controller supports only one chip select, the num-cs should default to 1 and cannot exceed 1 unless GPIOs are used as chip selects. > > + then: > > + properties: > > + num-cs: > > + default: 1 > > + maximum: 1 > > + > > unevaluatedProperties: false > > > > examples: > > Best regards, > Krzysztof > Best regards, Prajna
