> > > > > > As PLDA dts binding doc(Documentation/devicetree/bindings/pci/ > > plda,xpressrich3-axi-common.yaml) showed, PLDA PCIe contains an > > interrupt controller. > > > > Microchip PolarFire PCIE event IRQs includes PLDA interrupts and > > Polarfire additional interrupts. The interrupt irqchip ops includes > > ack/mask/unmask interrupt ops, which will write correct registers. > > Microchip Polarfire PCIe additional interrupts require to write > > Polarfire SoC self-defined registers. So Microchip PCIe event irqchip ops can > not be re-used. > > > > Microchip Polarfire PCIe additional intrerrupts: > > (defined in drivers/pci/controller/plda/pcie-microchip-host.c) > > EVENT_PCIE_L2_EXIT > > EVENT_PCIE_HOTRST_EXIT > > EVENT_PCIE_DLUP_EXIT > > EVENT_SEC_TX_RAM_SEC_ERR > > EVENT_SEC_RX_RAM_SEC_ERR > > .... > > > > To support PLDA its own event IRQ process, implements PLDA irqchip ops > > and add event irqchip field to struct pcie_plda_rp. > > >Hi Thomas > Could you review this patch? Thanks. > Hi Thomas Previous Lorrenzo ask you to review this patch. The PLDA PCIe interrupt register can be seen in the patch. All: Sorry to resend this. Minda
