This bus clock is needed for pinctrl register access to work. Add it. Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 8d4216cbab2e..f8fcbbb06e7b 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1327,6 +1327,8 @@ cmu_hsi2: clock-controller@14400000 { pinctrl_hsi2: pinctrl@14440000 { compatible = "google,gs101-pinctrl"; reg = <0x14440000 0x00001000>; + clocks = <&cmu_hsi2 CLK_GOUT_HSI2_GPIO_HSI2_PCLK>; + clock-names = "pclk"; interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>; }; -- 2.44.0.769.g3c40516874-goog