If there are no further comments. Please merge this patch. Regards Pankaj > -----Original Message----- > From: Pankaj Gupta > Sent: Tuesday, April 9, 2024 2:53 PM > To: robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > conor+dt@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx; > kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; dl-linux-imx <linux- > imx@xxxxxxx>; Peng Fan <peng.fan@xxxxxxx>; Jacky Bai > <ping.bai@xxxxxxx>; Bough Chen <haibo.chen@xxxxxxx>; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx > Cc: Pankaj Gupta <pankaj.gupta@xxxxxxx>; Varun Sethi <V.Sethi@xxxxxxx> > Subject: [PATCH v4] arm64: dts: imx8ulp: add caam jr > > Add crypto node in device tree for: > - CAAM job-ring > > Signed-off-by: Varun Sethi <v.sethi@xxxxxxx> > Signed-off-by: Pankaj Gupta <pankaj.gupta@xxxxxxx> > --- > > v4: > - Order of node properties changed. > > v3: > - Commit message title is changed from "imx8ulp-evk" to "imx8ulp". > > v2: > - As requested, this patch is separated from the larger patch-set of 9 > patches. > > Commit > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 32 > ++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index 8a6596d5a581..ed86854a59c3 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -252,6 +252,38 @@ pcc3: clock-controller@292d0000 { > #reset-cells = <1>; > }; > > + crypto: crypto@292e0000 { > + compatible = "fsl,sec-v4.0"; > + reg = <0x292e0000 0x10000>; > + ranges = <0 0x292e0000 0x10000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + sec_jr0: jr@1000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x1000 0x1000>; > + interrupts = <GIC_SPI 82 > IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + sec_jr1: jr@2000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x2000 0x1000>; > + interrupts = <GIC_SPI 82 > IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + sec_jr2: jr@3000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x3000 0x1000>; > + interrupts = <GIC_SPI 82 > IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + sec_jr3: jr@4000 { > + compatible = "fsl,sec-v4.0-job-ring"; > + reg = <0x4000 0x1000>; > + interrupts = <GIC_SPI 82 > IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > + > tpm5: tpm@29340000 { > compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp- > tpm"; > reg = <0x29340000 0x1000>; > -- > 2.34.1