On 24/04/2024 16:16, Krzysztof Kozlowski wrote: >> + >> +/* BLZP1600 reset numbers as defined in the hardware architecture */ >> + >> +#define BLZP1600_A53_C0_HARD_RST 0 >> +#define BLZP1600_A53_C0_SOFT_RST 1 >> +#define BLZP1600_A53_C1_HARD_RST 2 >> +#define BLZP1600_A53_C1_SOFT_RST 3 >> +#define BLZP1600_A53_L2_CACHE_RST 4 >> +#define BLZP1600_A53_DBG_RST 5 >> +#define BLZP1600_GIC_RST 6 >> +#define BLZP1600_CRYPTO_RST 7 >> +/* reset 8 invalid */ > > Same concerns. > > However another problem is lack of users of it. Your patchset looks > random - this goes to subsustem, but there is no device binding, no > driver, no DTS. Could be result of lack of threading. :/ And now I see my reply at v1 saying that these gaps are unexpected. Please respond to reviewers comments either acknowledging the comment or responding with feedback. What are these header constants representing? Best regards, Krzysztof
