On Fri, Apr 05, 2024 at 10:21:53PM +0200, Marek Vasut wrote: > The first CSI2 pixel clock are supplied from IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT, > the second CSI2 pixel clock are supplied from IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT, > both clock are supplied from SYS_PLL2 and configured using assigned-clock DT > properties. Each CSI2 DT node configures its IMX8MP_CLK_MEDIA_CAMn_PIX_ROOT > clock. This used to be the case until likely a copy-paste error in commit > f78835d1e616 ("arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M") > which changed the second CSI2 node to configure IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT > using its assigned-clocks property. > > Fix the second CSI2 assigned-clock property back to the original correct > IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT . > > Fixes: f78835d1e616 ("arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M") > Signed-off-by: Marek Vasut <marex@xxxxxxx> Applied, thanks!