Hi Inochi
Thanks for your advice!
On 4/17/24 at 11:34, Inochi Amaoto wrote:
On Wed, Apr 17, 2024 at 08:53:11AM GMT, michael.opdenacker@xxxxxxxxxxx wrote:
From: Michael Opdenacker <michael.opdenacker@xxxxxxxxxxx>
This adds initial support for the Milk-V Duo S board
(https://milkv.io/duo-s), enabling the serial port,
making it possible to boot Linux to the command line.
Link: https://lore.kernel.org/linux-riscv/171266958507.1032617.9460749136730849811.robh@xxxxxxxxxx/T/#t
Signed-off-by: Michael Opdenacker <michael.opdenacker@xxxxxxxxxxx>
---
arch/riscv/boot/dts/sophgo/Makefile | 1 +
.../boot/dts/sophgo/sg2000-milkv-duos.dts | 34 +++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 arch/riscv/boot/dts/sophgo/sg2000-milkv-duos.dts
diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
index 57ad82a61ea6..e008acb5240f 100644
--- a/arch/riscv/boot/dts/sophgo/Makefile
+++ b/arch/riscv/boot/dts/sophgo/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
+dtb-$(CONFIG_ARCH_SOPHGO) += sg2000-milkv-duos.dtb
dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
diff --git a/arch/riscv/boot/dts/sophgo/sg2000-milkv-duos.dts b/arch/riscv/boot/dts/sophgo/sg2000-milkv-duos.dts
new file mode 100644
index 000000000000..c1ecf97d5e93
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/sg2000-milkv-duos.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Michael Opdenacker <michael.opdenacker@xxxxxxxxxxx>
+ */
+
+/dts-v1/;
+
+#include "cv1812h.dtsi"
+
+/ {
+ model = "Milk-V Duo S";
+ compatible = "milkv,duos", "sophgo,cv1812h";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>;
+ };
Add a cpu specific file, and move this to it.
Now that I'm including "cv1812h.dtsi", which has the same structure, all
I need is to change the reg setting to have 512 MB of RAM instead of
256MB, right? See the V6 I'm sending soon.
+};
+
+&osc {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.34.1
Add necessary DT node in the cpu specific file. (clint,
plic and clk). You also need to rebase your patch based
on sophgo/for-next.
Same here, cv1812h.dtsi already configures &clint, &plic and &clk, so it
seems to me I don't need to make changes again here. At least the board
boots fine for me as it is.
Cheers
Michael.
--
Michael Opdenacker, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
