On Mon, Apr 15, 2024 at 02:13:15PM +0800, Xu Yang wrote:
> In current design, the user of perf app needs to input counter ID to count
> events. However, this is not user-friendly since the user needs to lookup
> the map table to find the counter. Instead of letting the user to input
> the counter, let this driver to manage the counters in this patch.
>
> This will be implemented by:
> 1. allocate counter 0 for cycle event.
> 2. find unused counter from 1-10 for reference events.
> 3. allocate specific counter for counter-specific events.
>
> In this patch, counter attr will be kept for back-compatible but all the
> value passed down by counter=<n> will be ignored. To mark counter-specific
> events, counter ID will be encoded into perf_pmu_events_attr.id.
>
> Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
> Signed-off-by: Xu Yang <xu.yang_2@xxxxxxx>
>
> ---
> Changes in v6:
> - new patch
> Changes in v7:
> - no changes
> Changes in v8:
> - add Rb tag
> Changes in v9:
> - keep 'counter' attr for back-compatible
> Changes in v10:
> - add some explanation about 'counter' attr in commit message
> ---
> drivers/perf/fsl_imx9_ddr_perf.c | 168 ++++++++++++++++++-------------
> 1 file changed, 100 insertions(+), 68 deletions(-)
[...]
> @@ -245,8 +249,8 @@ static const struct attribute_group ddr_perf_events_attr_group = {
> .attrs = ddr_perf_events_attrs,
> };
>
> -PMU_FORMAT_ATTR(event, "config:0-7");
> -PMU_FORMAT_ATTR(counter, "config:8-15");
> +PMU_FORMAT_ATTR(event, "config:0-15");
> +PMU_FORMAT_ATTR(counter, "config:16-23");
Although these mappings are advertised in sysfs, I don't think we can
change them because userspace could be relying on them. I also can't
find any examples of other PMU drivers in the kernel changing these
mappings after being merged, so please keep tthem the same.
If you need to expand the properties to be 16-bit, then you'll need to
split them into 2x8-bit fields.
Will
