On Thu, Apr 18, 2024 at 11:37:20PM +0300, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@xxxxxxx>
>
> Add node for i.MX8ULP's DSP core and its dependencies.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 39 +++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 22 +++++++++++
8ulp.dtsi and imx8ulp-evk.dts need two patches. one for imx8ulp.dtsi, the
other for imx8ulp-evk.dts.
Frank
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> index 24bb253b938d..5dadcbba370d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> @@ -67,6 +67,32 @@ vdevbuffer: vdevbuffer@a8400000 {
> reg = <0 0xa8400000 0 0x100000>;
> no-map;
> };
> +
> + dsp_reserved: dsp_reserved@8e000000 {
> + reg = <0 0x8e000000 0 0x1000000>;
> + no-map;
> + };
> +
> + dsp_reserved_heap: dsp_reserved_heap@8f000000 {
> + reg = <0 0x8f000000 0 0xef0000>;
> + no-map;
> + };
> +
> + dsp_vdev0vring0: vdev0vring0@8fef0000 {
> + reg = <0 0x8fef0000 0 0x8000>;
> + no-map;
> + };
> +
> + dsp_vdev0vring1: vdev0vring1@8fef8000 {
> + reg = <0 0x8fef8000 0 0x8000>;
> + no-map;
> + };
> +
> + dsp_vdev0buffer: vdev0buffer@8ff00000 {
> + compatible = "shared-dma-pool";
> + reg = <0 0x8ff00000 0 0x100000>;
> + no-map;
> + };
> };
>
> clock_ext_rmii: clock-ext-rmii {
> @@ -95,6 +121,15 @@ &cm33 {
> status = "okay";
> };
>
> +&dsp {
> + assigned-clocks = <&cgc2 IMX8ULP_CLK_HIFI_SEL>, <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>;
> + assigned-clock-parents = <&cgc2 IMX8ULP_CLK_PLL4_PFD0>;
> + assigned-clock-rates = <0>, <475200000>;
> + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
> + <&dsp_vdev0vring1>, <&dsp_reserved>;
> + status = "okay";
> +};
> +
> &flexspi2 {
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&pinctrl_flexspi2_ptd>;
> @@ -176,6 +211,10 @@ &mu {
> status = "okay";
> };
>
> +&mu3 {
> + status = "okay";
> +};
> +
> &iomuxc1 {
> pinctrl_enet: enetgrp {
> fsl,pins = <
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index c4a0082f30d3..99ed8c1ee57c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -198,6 +198,22 @@ soc: soc@0 {
> ranges = <0x0 0x0 0x0 0x40000000>,
> <0x60000000 0x0 0x60000000 0x1000000>;
>
> + dsp: dsp@21170000 {
> + compatible = "fsl,imx8ulp-hifi4";
> + reg = <0x21170000 0x20000>;
> + clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>,
> + <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>,
> + <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
> + <&pcc5 IMX8ULP_CLK_MU3_B>;
> + clock-names = "ipg", "ocram", "core", "mu";
> + power-domains = <&scmi_devpd IMX8ULP_PD_HIFI4>;
> + firmware-name = "imx/dsp/hifi4.bin";
> + mbox-names = "tx", "rx", "rxdb";
> + mboxes = <&mu3 0 0>, <&mu3 1 0>, <&mu3 3 0>;
> + fsl,dsp-ctrl = <&avd_sim>;
> + status = "disabled";
> + };
> +
> s4muap: mailbox@27020000 {
> compatible = "fsl,imx8ulp-mu-s4";
> reg = <0x27020000 0x10000>;
> @@ -520,6 +536,12 @@ per_bridge5: bus@2d800000 {
> #size-cells = <1>;
> ranges;
>
> + avd_sim: syscon@2da50000 {
> + compatible = "fsl,imx8ulp-avd-sim", "syscon", "simple-mfd";
Any driver actually use "fsl,imx8ulp-avd-sim"?
> + reg = <0x2da50000 0x38>;
> + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
> + };
> +
> cgc2: clock-controller@2da60000 {
> compatible = "fsl,imx8ulp-cgc2";
> reg = <0x2da60000 0x10000>;
> --
> 2.34.1
>
