On Mon, Apr 15, 2024 at 12:37:40AM +0100, Andre Przywara wrote:
> On Sun, 14 Apr 2024 12:04:24 -0500
> Chris Morgan <macroalpha82@xxxxxxxxx> wrote:
>
> Hi Chris,
>
> > From: Chris Morgan <macromorgan@xxxxxxxxxxx>
> >
> > Add device node for the H616 Non Maskable Interrupt (NMI) controller.
>
> You might want to mention that the NMI pad is not exposed on the H616 variants, but on
> the T507 and H700 packages.
>
> >
> > Signed-off-by: Chris Morgan <macromorgan@xxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > index b2e85e52d1a1..1e066f3057be 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> > @@ -775,6 +775,15 @@ r_ccu: clock@7010000 {
> > #reset-cells = <1>;
> > };
> >
> > + nmi_intc: interrupt-controller@7010320 {
> > + compatible = "allwinner,sun50i-h616-nmi",
> > + "allwinner,sun9i-a80-nmi";
> > + reg = <0x07010320 0xc>;
> > + interrupt-controller;
> > + #interrupt-cells = <2>;
> > + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
>
> I can confirm that this matches the manual, and the registers behave as
> described in the A80 manual. I don't have access to a chip with the NMI
> pad exposed or used, so I cannot test this fully, but Chris'
> experiments with the AXP717 PMIC connected to that pin on on H700
> board seem to confirm that it indeed works.
>
> So with that small amendment to the commit message please take my:
>
> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
>
> Cheers,
> Andre
>
> > r_pio: pinctrl@7022000 {
> > compatible = "allwinner,sun50i-h616-r-pinctrl";
> > reg = <0x07022000 0x400>;
>
Since the H616 doesn't have this functionality but the T507 and H700
does, should I change the compatible string? It's all the same
silicon die with just a different part number printed on it, but
still...
Thank you.
Chris
