On Wed, Apr 3, 2024 at 10:36 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Document RZ/Five (R9A07G043F) IRQC bindings. The IRQC block on the RZ/Five > SoC is almost identical to the one found on the RZ/G2L SoC, with the only > difference being that it has additional mask control registers for > NMI/IRQ/TINT. > > Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five > SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > --- > v1->v2 > - Dropped the checks for interrupts as its already handled > - Added SoC specific compat string Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds