This patch series is adding support for second version of Marvell HW overlay for Cadence xSPI IP block. Overlay extends xSPI features, with clock configuration, interrupt masking and full-duplex, variable length SPI operations. All that functionalites allows xSPI block to operate not only with memory devices, but also with simple SPI devices, or TPM devices. Piyush Malgujar (1): spi: cadence: Allow to read basic xSPI configuration from ACPI Witold Sadowski (4): spi: cadence: Ensure data lines set to low during dummy-cycle period spi: cadence: Add MRVL overlay bindings documentation for Cadence XSPI spi: cadence: Add Marvell xSPI IP overlay changes spi: cadence: Add MRVL overlay xfer operation support .../devicetree/bindings/spi/cdns,xspi.yaml | 92 ++- drivers/spi/spi-cadence-xspi.c | 691 +++++++++++++++++- 2 files changed, 762 insertions(+), 21 deletions(-) -- 2.43.0
