On 17.04.24 12:14, Ahmad Fatoum wrote:
> On 16.04.24 16:19, Marek Vasut wrote:
>> Configure both CSI2 assigned-clock-rates the same way.
>> There does not seem to be any reason for keeping the
>> two CSI2 pixel clock set to different frequencies.
>>
>> This also reduces first CSI2 clock from overdrive mode
>> frequency which is 500 MHz down below the regular mode
>> frequency of 400 MHz.
>>
>> Signed-off-by: Marek Vasut <marex@xxxxxxx>
>
> Reviewed-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
I see now that the node has a clock-frequency = <500000000>; still.
This should be lowered too, shouldn't it?
Cheers,
Ahmad
>
>> ---
>> Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
>> Cc: Fabio Estevam <festevam@xxxxxxxxx>
>> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
>> Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
>> Cc: Paul Elder <paul.elder@xxxxxxxxxxxxxxxx>
>> Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
>> Cc: Rob Herring <robh@xxxxxxxxxx>
>> Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
>> Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
>> Cc: devicetree@xxxxxxxxxxxxxxx
>> Cc: imx@xxxxxxxxxxxxxxx
>> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
>> ---
>> V2: Align both clock to 266 MHz and update commit message
>> ---
>> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> index 1bb96e96639f2..7883f5c056f4e 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>> <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>> assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>> <&clk IMX8MP_CLK_24M>;
>> - assigned-clock-rates = <500000000>;
>> + assigned-clock-rates = <266000000>;
>> power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>> status = "disabled";
>>
>
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