Hi Rob, > Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: support i.MX95 SCMI pinctrl > > On Fri, Apr 12, 2024 at 08:29:25AM +0800, Peng Fan (OSS) wrote: > > From: Peng Fan <peng.fan@xxxxxxx> > > > > i.MX95 Pinctrl is managed by SCMI firmware using OEM extensions. This > > patch is to add i.MX95 Pinctrl OEM extensions properties. > > > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> > > --- > > .../bindings/pinctrl/nxp,imx95-pinctrl.yaml | 44 > ++++++++++++++++++++++ > > 1 file changed, 44 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/pinctrl/nxp,imx95-pinctrl.yaml > > b/Documentation/devicetree/bindings/pinctrl/nxp,imx95-pinctrl.yaml > > new file mode 100644 > > index 000000000000..4bf7a6192813 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/nxp,imx95-pinctrl.yaml > > @@ -0,0 +1,44 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2024 > > +NXP %YAML 1.2 > > +--- > > +$id: > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > > +cetree.org%2Fschemas%2Fpinctrl%2Fnxp%2Cimx95- > pinctrl.yaml%23&data=05% > > > +7C02%7Cpeng.fan%40nxp.com%7C4c448715c4ad4cd1f70808dc5d9e6924% > 7C686ea1 > > > +d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638488182142511691%7CU > nknown%7CT > > > +WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiL > CJXVC > > > +I6Mn0%3D%7C0%7C%7C%7C&sdata=BckWIcVgYU6l8lV6fIpyDIZHt5hCyFdgF > xaWBUBb9 > > +7s%3D&reserved=0 > > +$schema: > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > > +cetree.org%2Fmeta- > schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx > > > +p.com%7C4c448715c4ad4cd1f70808dc5d9e6924%7C686ea1d3bc2b4c6fa9 > 2cd99c5c > > > +301635%7C0%7C0%7C638488182142522802%7CUnknown%7CTWFpbGZs > b3d8eyJWIjoiM > > > +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7 > C%7C%7 > > > +C&sdata=1BJASfju905Rua9G2mkNvPKDppN9%2BP5UaxFCbXDtPqo%3D&res > erved=0 > > + > > +title: i.MX System Control and Management Interface (SCMI) Pinctrl > > +Protocol > > + > > +maintainers: > > + - Peng Fan <peng.fan@xxxxxxx> > > + > > +patternProperties: > > + '-pins$': false > > Why? The node will be as blow, there is no "-pins$". +&scmi_iomuxc { + pinctrl_uart1: uart1grp { + txd { + pins = "uart1txd"; + nxp,func-id = <0>; + nxp,pin-conf = <0x31e>; + }; + rxd { + pins = "uart1rxd"; + nxp,func-id = <0>; + nxp,pin-conf = <0x31e>; + }; + }; > > > + 'grp$': > > + type: object > > Missing 'additionalProperties: false' Fix in v2. > > > + > > + properties: > > + $nodename: > > + pattern: "^[0-9a-f]+$" > > Drop. That has no effect. You just defined the nodename above. This is to define a subnode, as just listed above, "txd" and "rxd". > > > + > > + pins: > > + $ref: /schemas/types.yaml#/definitions/string > > + description: name of the pin > > Needs to define the possible values. There will be hundreds of pins, I need to list them all here? > > > + > > + nxp,func-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: high impedance mode ("third-state", "floating") > > We already have a standard property for high impendance. You should know > that since you obviously copied the description... My bad. Fix in v2. > > > + > > + nxp,pin-conf: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: latch weakly > > Same here. Fix in v2. > > > + > > + nxp,daisy-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: pull up the pin. Takes as optional argument on hardware > > + supporting it the pull strength in Ohm. > > And here... Fix in v2. > > > + > > + nxp,daisy-conf: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: pull down the pin. Takes as optional argument on > hardware > > + supporting it the pull strength in Ohm. > > And here... Fix in v2. Thanks, Peng. > > > + > > +additionalProperties: true > > > > -- > > 2.37.1 > >
