On Thu, Apr 11, 2024 at 04:36:48PM +0200, Christophe Roullier wrote:
> New STM32 SOC have 2 GMACs instances.
> GMAC IP version is SNPS 4.20.
>
> Signed-off-by: Christophe Roullier <christophe.roullier@xxxxxxxxxxx>
> ---
> .../devicetree/bindings/net/stm32-dwmac.yaml | 80 +++++++++++++++++--
> 1 file changed, 72 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> index 857d58949b029..20f58eff6e6f9 100644
> --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> @@ -22,18 +22,17 @@ select:
> enum:
> - st,stm32-dwmac
> - st,stm32mp1-dwmac
> + - st,stm32mp13-dwmac
> required:
> - compatible
>
> -allOf:
> - - $ref: snps,dwmac.yaml#
> -
> properties:
> compatible:
> oneOf:
> - items:
> - enum:
> - st,stm32mp1-dwmac
> + - st,stm32mp13-dwmac
> - const: snps,dwmac-4.20a
> - items:
> - enum:
> @@ -74,13 +73,16 @@ properties:
>
> st,syscon:
> $ref: /schemas/types.yaml#/definitions/phandle-array
> - items:
> - - items:
It is subtle, but the '-' there was significant...
> - - description: phandle to the syscon node which encompases the glue register
> - - description: offset of the control register
> description:
> Should be phandle/offset pair. The phandle to the syscon node which
> - encompases the glue register, and the offset of the control register
> + encompases the glue register, the offset of the control register and
> + the mask to set bitfield in control register
> + items:
> + minItems: 2
> + items:
Now you removed it, so any number of <phandle offset mask> are allowed.
You need:
items:
- minItems: 2
items:
- ...
> + - description: phandle to the syscon node which encompases the glue register
> + - description: offset of the control register
> + - description: field to set mask in register
>
> st,ext-phyclk:
> description:
> @@ -108,6 +110,34 @@ required:
>
> unevaluatedProperties: false
>
> +allOf:
> + - $ref: snps,dwmac.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - st,stm32mp1-dwmac
> + - st,stm32-dwmac
> + then:
> + properties:
> + st,syscon:
> + items:
> + minItems: 2
You mean 'maxItems: 2' as 2 is already the min.
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - st,stm32mp13-dwmac
> + then:
> + properties:
> + st,syscon:
> + items:
> + minItems: 3
> +
> +
> examples:
> - |
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -168,3 +198,37 @@ examples:
> snps,pbl = <8>;
> phy-mode = "mii";
> };
> +
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/stm32mp1-clks.h>
> + #include <dt-bindings/reset/stm32mp1-resets.h>
> + #include <dt-bindings/mfd/stm32h7-rcc.h>
> + //Example 4
Not a useful comment.
> + ethernet3: ethernet@5800a000 {
> + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
> + reg = <0x5800a000 0x2000>;
> + reg-names = "stmmaceth";
> + interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> + <&exti 68 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq",
> + "eth_wake_irq";
> + clock-names = "stmmaceth",
> + "mac-clk-tx",
> + "mac-clk-rx",
> + "eth-ck",
> + "ptp_ref",
> + "ethstp";
> + clocks = <&rcc ETHMAC>,
> + <&rcc ETHTX>,
> + <&rcc ETHRX>,
> + <&rcc ETHCK_K>,
> + <&rcc ETHPTP_K>,
> + <&rcc ETHSTP>;
> + st,syscon = <&syscfg 0x4 0xff0000>;
> + snps,mixed-burst;
> + snps,pbl = <2>;
> + snps,axi-config = <&stmmac_axi_config_1>;
> + snps,tso;
> + phy-mode = "rmii";
> + };
> --
> 2.25.1
>
