Hi, On Sat, Apr 13, 2024 at 02:46:07PM +0800, Jianfeng Liu wrote: > Enable Hantro G1 video decoder in RK3588's devicetree. > > Tested with FFmpeg v4l2_request code taken from [1] > with MPEG2, H.264 and VP8 samples. > > [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > > Signed-off-by: Jianfeng Liu <liujianfeng1994@xxxxxxxxx> > --- Reviewed-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> -- Sebastian > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index ac5bd630f..de823f461 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1072,6 +1072,27 @@ power-domain@RK3588_PD_SDMMC { > }; > }; > > + vpu: video-codec@fdb50000 { > + compatible = "rockchip,rk3588-vdpu121", "rockchip,rk3568-vpu"; > + reg = <0x0 0xfdb50000 0x0 0x800>; > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > + interrupt-names = "vdpu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "hclk"; > + iommus = <&vdpu_mmu>; > + power-domains = <&power RK3588_PD_VDPU>; > + }; > + > + vdpu_mmu: iommu@fdb50800 { > + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; > + reg = <0x0 0xfdb50800 0x0 0x40>; > + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > + clock-names = "aclk", "iface"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + power-domains = <&power RK3588_PD_VDPU>; > + #iommu-cells = <0>; > + }; > + > av1d: video-codec@fdc70000 { > compatible = "rockchip,rk3588-av1-vpu"; > reg = <0x0 0xfdc70000 0x0 0x800>; > -- > 2.34.1 > >
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