On Sun, Apr 14, 2024 at 07:56:42AM +0200, Michael Opdenacker wrote: > Hi Inochi > > On 4/11/24 at 09:38, Inochi Amaoto wrote: > > On Sat, 9 Mar 2024 17:01:21 +0800, Inochi Amaoto wrote: > > > Add clock controller support for the Sophgo CV1800B, CV1812H and SG2000. > > > > > > Changed from v8: > > > 1. improve code. > > > 2. remove default config in Kconfig. > > > 3. merge patch 2-4 of v8 into one. > > > > > > [...] > > > > Applied to sophgo/for-next, thanks! > > > > [5/6] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC > > https://github.com/sophgo/linux/commit/bb7b3419627eb34f3466022d1f4b3c942c09712d > > [6/6] riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC > > https://github.com/sophgo/linux/commit/18e8c6d2cced6c57d62813f49b57eeb8ee02f984 > > Oops, for your information, this last change > ([6/6] riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC) > breaks my Milk-V Duo S board when I boot it with cv1812h-huashan-pi.dtb as I > believe you suggested. > > I don't know whether the board actually boots, but at least I don't get any > more output in the console. > > Has someone tested this on the real Huashan Pi board? > > Cheers > Michael. > Hi Michael, I think you boot with the `defconfig` config. This config does not enable the CV1800 clk support. I think you may need to apply [1], which enable the clk driver. Also if you want to test sdhci with real clk, you can try [2]. I test them on the Milk-V Duo S. Regards, Inochi [1] https://lore.kernel.org/all/IA1PR20MB4953CA5D46EA8913B130D502BB052@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ [2] https://lore.kernel.org/all/IA1PR20MB4953CA5D46EA8913B130D502BB052@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/
