The default configuration of the PMIC behavior makes the PMIC
power cycle most regulators on PMIC_RST_B assertion. This power
cycling causes the memory contents of OCRAM to be lost.
Some systems needs some memory that survives reset and
reboot, therefore this patch is created.
This patch extends commit 2364a64d0673 ("regulator: pca9450:
Make warm reset on WDOG_B assertion") to the other reset
input source PMIC_RST_B as per pmic specs.
Cc: Matteo Lisi <matteo.lisi@xxxxxxxxxxx>
Cc: Mirko Ardinghi <mirko.ardinghi@xxxxxxxxxxx>
Signed-off-by: Fabio Aiuto <fabio.aiuto@xxxxxxxxxxx>
---
drivers/regulator/pca9450-regulator.c | 11 ++++++++---
include/linux/regulator/pca9450.h | 6 ++++++
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c
index be488c5dff14..3a7f238de1a5 100644
--- a/drivers/regulator/pca9450-regulator.c
+++ b/drivers/regulator/pca9450-regulator.c
@@ -999,11 +999,16 @@ static int pca9450_i2c_probe(struct i2c_client *i2c)
else
reset_ctrl = WDOG_B_CFG_COLD_LDO12;
- /* Set reset behavior on assertion of WDOG_B signal */
+ if (of_property_read_bool(i2c->dev.of_node, "nxp,pmic-rst-b-warm-reset"))
+ reset_ctrl |= PMIC_RST_CFG_WARM;
+ else
+ reset_ctrl |= PMIC_RST_CFG_COLD_LDO12;
+
+ /* Set reset behavior on assertion of WDOG_B/PMIC_RST_B signal */
ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL,
- WDOG_B_CFG_MASK, reset_ctrl);
+ WDOG_B_CFG_MASK | PMIC_RST_CFG_MASK, reset_ctrl);
if (ret) {
- dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n");
+ dev_err(&i2c->dev, "Failed to set WDOG_B/PMIC_RST_B reset behavior\n");
return ret;
}
diff --git a/include/linux/regulator/pca9450.h b/include/linux/regulator/pca9450.h
index 243633c8dceb..d87f0b410b00 100644
--- a/include/linux/regulator/pca9450.h
+++ b/include/linux/regulator/pca9450.h
@@ -227,6 +227,12 @@ enum {
#define WDOG_B_CFG_COLD_LDO12 0x80
#define WDOG_B_CFG_COLD 0xC0
+#define PMIC_RST_CFG_MASK 0x30
+#define PMIC_RST_CFG_NONE 0x00
+#define PMIC_RST_CFG_WARM 0x10
+#define PMIC_RST_CFG_COLD_LDO12 0x20
+#define PMIC_RST_CFG_COLD 0x30
+
/* PCA9450_REG_CONFIG2 bits */
#define I2C_LT_MASK 0x03
#define I2C_LT_FORCE_DISABLE 0x00
--
2.34.1
