Hi Neha
On 3/26/2024 5:57 PM, Neha Malcom Francis wrote:
There are 4 watchdog instances in the MAIN domain:
* one each for the 2 A72 cores
* one each for the 2 R5F cores
Currently, the devicetree only describes watchdog instances for the A72
cores and enables them. Describe the remaining but reserve them as they
will be used by their respective firmware.
Signed-off-by: Neha Malcom Francis <n-francis@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 657f9cc9f4ea..c448c2218e23 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1254,6 +1254,33 @@ watchdog1: watchdog@2210000 {
assigned-clock-parents = <&k3_clks 253 5>;
};
+ /*
+ * The following RTI instances are coupled with MCU R5Fs so
+ * keeping them reserved as these will be used by their respective
+ * firmware
+ */
+ watchdog2: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 258 1>;
+ power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 258 1>;
+ assigned-clock-parents = <&k3_clks 258 5>;
+ /* reserved for MAIN_R5F0_0 */
+ status = "reserved";
+ };
+
+ watchdog3: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 259 1>;
+ power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 259 1>;
+ assigned-clock-parents = <&k3_clks 259 5>;
+ /* reserved for MAIN_R5F0_1 */
+ status = "reserved";
+ };
+
Please see, if this make more sense to have label as watchdog28 and
watchdog29, to align with TRM.
Also request to add mcu domain 2 watchdog as well.
main_timer0: timer@2400000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
