On Mon, Apr 01, 2024 at 07:21:51PM +0200, Adam Skladowski wrote: > diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi [..] > + mdss: display-subsystem@1a00000 { [..] > + mdss_dsi0: dsi@1a94000 { > + compatible = "qcom,msm8976-dsi-ctrl", "qcom,mdss-dsi-ctrl"; > + reg = <0x01a94000 0x25c>; > + reg-names = "dsi_ctrl"; > + > + interrupt-parent = <&mdss>; > + interrupts = <4>; > + > + clocks = <&gcc GCC_MDSS_MDP_CLK>, > + <&gcc GCC_MDSS_AHB_CLK>, > + <&gcc GCC_MDSS_AXI_CLK>, > + <&gcc GCC_MDSS_BYTE0_CLK>, > + <&gcc GCC_MDSS_PCLK0_CLK>, > + <&gcc GCC_MDSS_ESC0_CLK>; > + clock-names = "mdp_core", > + "iface", > + "bus", > + "byte", > + "pixel", > + "core"; > + > + assigned-clocks = <&gcc GCC_MDSS_BYTE0_CLK_SRC>, > + <&gcc GCC_MDSS_PCLK0_CLK_SRC>; > + assigned-clock-parents = <&mdss_dsi0_phy 0>, > + <&mdss_dsi0_phy 1>; > + > + phys = <&mdss_dsi0_phy>; > + > + operating-points-v2 = <&dsi0_opp_table>; > + power-domains = <&gcc MDSS_GDSC>; > + > + #address-cells = <1>; > + #size-cells = <0>; > + Seems reasonable to keep this disabled as well. Further more &mdss_dsi0 depends on &mdss_dsi0_phy which is disabled. > + ports { [..] > + mdss_dsi0_phy: phy@1a94a00 { > + compatible = "qcom,dsi-phy-28nm-hpm-fam-b"; > + reg = <0x01a94a00 0xd4>, > + <0x01a94400 0x280>, > + <0x01a94b80 0x30>; > + reg-names = "dsi_pll", > + "dsi_phy", > + "dsi_phy_regulator"; > + > + #clock-cells = <1>; > + #phy-cells = <0>; > + > + clocks = <&gcc GCC_MDSS_AHB_CLK>, > + <&rpmcc RPM_SMD_XO_CLK_SRC>; > + clock-names = "iface", "ref"; > + > + status = "disabled"; > + }; PS. Leave &mdss_mdp enabled... Regards, Bjorn