On Wed, 3 Apr 2024 at 13:42, Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> wrote: > > Unlike MSM platforms that manage NoC related clocks and scaling > from RPM, IPQ SoCs dont involve RPM in managing NoC related > clocks and there is no NoC scaling. > > However, there is a requirement to enable some NoC interface > clocks for accessing the peripheral controllers present on > these NoCs. Though exposing these as normal clocks would work, > having a minimalistic interconnect driver to handle these clocks > would make it consistent with other Qualcomm platforms resulting > in common code paths. This is similar to msm8996-cbf's usage of > icc-clk framework. > > Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> > --- > v7: Restore clk_get > v6: first_id -> icc_first_node_id > Remove clock get so that the peripheral that uses the clock > can do the clock get > v5: Split changes in common.c to separate patch > Fix error handling > Use devm_icc_clk_register instead of icc_clk_register > v4: Use clk_hw instead of indices > Do icc register in qcom_cc_probe() call stream > Add icc clock info to qcom_cc_desc structure > v3: Use indexed identifiers here to avoid confusion > Fix error messages and move to common.c > v2: Move DTS to separate patch > Update commit log > Auto select CONFIG_INTERCONNECT & CONFIG_INTERCONNECT_CLK to fix build error > --- > drivers/clk/qcom/common.c | 31 ++++++++++++++++++++++++++++++- > drivers/clk/qcom/common.h | 3 +++ > 2 files changed, 33 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c > index 8b6080eb43a7..fa4ec89c04c4 100644 > --- a/drivers/clk/qcom/common.c > +++ b/drivers/clk/qcom/common.c > @@ -8,6 +8,7 @@ > #include <linux/regmap.h> > #include <linux/platform_device.h> > #include <linux/clk-provider.h> > +#include <linux/interconnect-clk.h> > #include <linux/reset-controller.h> > #include <linux/of.h> > > @@ -252,6 +253,34 @@ static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec, > return cc->rclks[idx] ? &cc->rclks[idx]->hw : NULL; > } > > +static int qcom_cc_icc_register(struct device *dev, > + const struct qcom_cc_desc *desc) > +{ > + struct icc_clk_data *icd; > + int i; > + > + if (!IS_ENABLED(CONFIG_INTERCONNECT_CLK)) > + return 0; > + > + if (!desc->icc_hws) > + return 0; > + > + icd = devm_kcalloc(dev, desc->num_icc_hws, sizeof(*icd), GFP_KERNEL); > + if (!icd) > + return -ENOMEM; > + > + for (i = 0; i < desc->num_icc_hws; i++) { > + icd[i].clk = devm_clk_hw_get_clk(dev, desc->icc_hws[i], "icc"); > + if (!icd[i].clk) > + return dev_err_probe(dev, -ENOENT, > + "(%d) clock entry is null\n", i); > + icd[i].name = clk_hw_get_name(desc->icc_hws[i]); > + } > + > + return devm_icc_clk_register(dev, desc->icc_first_node_id, > + desc->num_icc_hws, icd); > +} > + > int qcom_cc_really_probe(struct platform_device *pdev, > const struct qcom_cc_desc *desc, struct regmap *regmap) > { > @@ -327,7 +356,7 @@ int _qcom_cc_really_probe(struct device *dev, > if (ret) > return ret; > > - return 0; > + return qcom_cc_icc_register(dev, desc); > } > EXPORT_SYMBOL_GPL(_qcom_cc_really_probe); > > diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h > index 8657257d56d3..43073d2ef32a 100644 > --- a/drivers/clk/qcom/common.h > +++ b/drivers/clk/qcom/common.h > @@ -29,6 +29,9 @@ struct qcom_cc_desc { > size_t num_gdscs; > struct clk_hw **clk_hws; > size_t num_clk_hws; > + struct clk_hw **icc_hws; Still we are passing hws here. We already have all the hws in a different array. Can we just pass the indices? > + size_t num_icc_hws; > + unsigned int icc_first_node_id; > }; > > /** > -- > 2.34.1 > -- With best wishes Dmitry