Hi Richard, kernel test robot noticed the following build warnings: [auto build test WARNING on robh/for-next] [also build test WARNING on linus/master v6.9-rc2] [cannot apply to next-20240402] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Richard-Zhu/dt-bindings-phy-phy-imx8-pcie-Add-binding-for-i-MX8Q-HSIO-SerDes-PHY/20240402-140347 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next patch link: https://lore.kernel.org/r/1712036704-21064-4-git-send-email-hongxing.zhu%40nxp.com patch subject: [PATCH v2 3/3] phy: freescale: imx8q-hsio: Add i.MX8Q HSIO PHY driver support config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20240403/202404030236.zuDJQOtw-lkp@xxxxxxxxx/config) compiler: arm-linux-gnueabi-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240403/202404030236.zuDJQOtw-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202404030236.zuDJQOtw-lkp@xxxxxxxxx/ All warnings (new ones prefixed by >>): >> drivers/phy/freescale/phy-fsl-imx8q-hsio.c:34: warning: "MODE_MASK" redefined 34 | #define MODE_MASK GENMASK(20, 17) | In file included from arch/arm/include/asm/ptrace.h:10, from arch/arm/include/asm/irqflags.h:7, from include/linux/irqflags.h:18, from arch/arm/include/asm/bitops.h:28, from include/linux/bitops.h:68, from include/linux/kernel.h:23, from include/linux/clk.h:13, from drivers/phy/freescale/phy-fsl-imx8q-hsio.c:6: arch/arm/include/uapi/asm/ptrace.h:67: note: this is the location of the previous definition 67 | #define MODE_MASK 0x0000001f | vim +/MODE_MASK +34 drivers/phy/freescale/phy-fsl-imx8q-hsio.c 27 28 /* i.MX8Q HSIO registers */ 29 #define CTRL0 0x0 30 #define APB_RSTN_0 BIT(0) 31 #define APB_RSTN_1 BIT(1) 32 #define PIPE_RSTN_0_MASK GENMASK(25, 24) 33 #define PIPE_RSTN_1_MASK GENMASK(27, 26) > 34 #define MODE_MASK GENMASK(20, 17) 35 #define MODE_PCIE 0x0 36 #define MODE_SATA 0x4 37 #define DEVICE_TYPE_MASK GENMASK(27, 24) 38 #define EPCS_TXDEEMP BIT(5) 39 #define EPCS_TXDEEMP_SEL BIT(6) 40 #define EPCS_PHYRESET_N BIT(7) 41 #define RESET_N BIT(12) 42 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
