In am33xx and am43xx, ehrpwm tbclk is derived from functional clock of PWMSS. The schematics and TRMs show that there is only one input clock to the PWMSS. But currently, tbclk is wrongly shown to be deriving from dpll_per_m2_ck instead of functional clock l4ls_gclk in the DT. Fixing ehrpwm tbclk data to reflect the right clk source. Tested on beaglebone and am437x-gp-evm. Vignesh R (2): ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx arch/arm/boot/dts/am33xx-clocks.dtsi | 6 +++--- arch/arm/boot/dts/am43xx-clocks.dtsi | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
