These SerDes lane select muxes use bits from the same register as
the SerDes clock select mux. Make the lane select mux a child
of the SerDes control node.
This removes one more requirement on scm-conf being a syscon node
which will later be converted to fix a couple DTS check warnings.
Signed-off-by: Andrew Davis <afd@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 738c5c4acbcd2..5ce67e6a33600 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -66,7 +66,7 @@ serdes0: serdes@900000 {
assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
ti,serdes-clk = <&serdes0_clk>;
#clock-cells = <1>;
- mux-controls = <&serdes_mux 0>;
+ mux-controls = <&serdes0_mux 0>;
};
serdes1: serdes@910000 {
@@ -81,7 +81,7 @@ serdes1: serdes@910000 {
assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
ti,serdes-clk = <&serdes1_clk>;
#clock-cells = <1>;
- mux-controls = <&serdes_mux 1>;
+ mux-controls = <&serdes1_mux 0>;
};
main_uart0: serial@2800000 {
@@ -485,18 +485,23 @@ scm_conf: scm-conf@100000 {
serdes0_clk: clock@4080 {
compatible = "ti,am654-serdes-ctrl", "syscon";
reg = <0x4080 0x4>;
+
+ serdes0_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x0 0x3>; /* lane select */
+ };
};
serdes1_clk: clock@4090 {
compatible = "ti,am654-serdes-ctrl", "syscon";
reg = <0x4090 0x4>;
- };
- serdes_mux: mux-controller {
- compatible = "mmio-mux";
- #mux-control-cells = <1>;
- mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
- <0x4090 0x3>; /* SERDES1 lane select */
+ serdes1_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x0 0x3>; /* lane select */
+ };
};
dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
--
2.39.2
